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In the previous video, we made this one bit register.
It's got a single input.
Single output here is led and its stores One bit of data.
And this is kind of ah, reminder.
Basically, the interface for this is we've got our input or output.
We've got a right signal which, if this is active than it, its stores, whatever's coming in our input.
And we have an enable signal which when this is active, it sends whatever bit is stored in here to our output.
Course registers we've been building also have a clock signal, which for this buddy, I'm gonna kind of sidestep.
But just as a reminder, You know, the clock makes this a synchronous register because it even if or when the the the right signal is active, it still only reads data at the rising edge of the clock.
So it's synchronous in the sense that it's synchronized with this clock for for when it's storing data.
But for now, just to simplify things, I'm not including the clock here.
We'll come back to that in the future video.
We talk more about the actual implementation of our memory.
Of course, after we implemented a one bit register.
We then went on to implement an eight bit register, which, you know, we've got a couple of them here we've got.
You know, this is our registers.
Is our Bieber register down here and it's the same idea.
Stores eight bits of data instead of one bit.
But we still have our enable signal.
We still have our right signal.
And then, of course, we have our clock in here as well to this white wire.
Yeah, And in this case, input and output are through the bus.
So we have our eight bits of input and output.
So it's essentially the same idea as our single bit register input, output right and enable.
But now we've got eight of them s we have our eight inputs are eight outputs.
We have a right and enable that, uh, either writes a whole bite into into all of these or enable it outputs the whole bite from all of these.
Now we want to build a memory for a computer.
Basically, we can do the same thing and just replicate that eight bit storage as many times as we want as we want bites that we want to store.
So in our case, we're gonna build a 16 bite memory so we could essentially replicate 16.
Essentially registers.
I guess eight bit registered a eight bit storage units, and we have a separate right signal for each of those registers.
Right?
Zero will right into this first memory location.
Right?
One.
Well, right into the 2nd 1 If this right to is active, it rates into the 3rd 1 And so on, all the way up to right.
15.
Which rights?
Into this last the 16th?
Uh, bite down here and you can see the eight bits that make up the bite are connected to each of these.
And, you know, we either we'd either have one of these enable Signal's active.
You know, one of these 16 enable Signal's active, in which case we would be reading whichever whichever bite is enabled.
So if we have enable one that's this bite here, this row is enabled.
Then it would be outputting each of its bits onto each of our eight bit lines.
So these these vertical lines we call those bit lines and then these horizontal, uh, rose are essentially our words.
Each one is a bite, but generally it's referred to as a word because it could be a different length, depending on the memory.
In our case, our memories is eight bit words, but you could get memory.
That's 16 bit words of 32 bit words or so on.
And so each of these memory cells each of these little boxes here is a memory cell.
And in our case, we're gonna build these.
We're gonna We're gonna use something that's very similar to the registers that we used, which, at its core, is essentially a latch, which is able to store one bit of data.
Um, in, ah, practical memory that you might you might have in your computer or, for example, the computer that I'm using to edit this video on.
I have 16 gigabytes of memory in that computer, so that would be 16 billion of these rows, essentially, which is which is a lot.
I certainly wouldn't want to build it like this, but you can imagine, you know, these these flip flops are fairly complex.
I mean, you know, you've seen the one that we built here, you know, six Well, 16 billion bytes, that 128 billion memory cells, so you wouldn't want to build 120 billion of these.
That certainly wouldn't work very well.
Of course, it can be miniaturized all the rest, but but even that is a fairly complex circuit to store one bit.
So most memory memory in my computer that I'm editing this video on, for example, uses essentially the simplest way of storing a bit, which is essentially in each of these cells is, you know, just a single transistor and a capacitor, and the bitch is stored as a charge on the capacitor.
Now, one drawback of that is that the capacitor will discharge overtime.
After a few seconds, it'll lose its charge, and so you can only store a bit in here for a couple seconds at most.
Um, but one way to get around that is that have a separate circuit that the region's bite of memory and then writes that same bite back into that same memory location, and we have a separate circuit that's doing that constantly is going through.
All of memory is reading every bite and then writing the exact same data back to that bite.
And so it's refreshing what's in each of those bits.
So even though you know a capacitor could only store that data for, you know, at most a couple seconds because we're reading and writing that many times a second, it's keeping that data refreshed.
But because we have to continually refresh it like that, um, this is referred to a dynamic ram its dynamic because if you don't refresh it, you lose the date of the tenant.
Whereas if we used a foot flop circuit or something like we've been building with our registers, as you know once you store ah, bit of data in here, it stays there essentially forever until we take the power away.
So as long as this is powered up, we don't have toe constantly.
Refresh this or anything.
We store the bed in there, it stays, it stays there.
And so this is if we're using this type of memory cell that's referred to a static ram, and that's what we're gonna do for our computer.
And it's static.
Ram is generally more expensive than dynamic Ram because you need a lot more transistors.
You know there's a lot more complexity to each memory cell in static ram.
It has some advantages, right?
You don't have to do the refresh, although that's, you know, fairly easy to do that, you know, certainly in a larger, larger scale computer.
But it's also generally faster.
So you see static ram used in special applications where you need really fast memory access.
Course we don't really care about speed for the computer we're building.
S O, you know, were basically using static RAM just because it's more convenient because we don't wanna have to build that that refresh circuit.
So for a computer, you know, he's a way to think of.
It is each of these bites is essentially just like the registers that we've already built.
So you already know how these work.
The thing that's a little bit weird now is that we have a separate right signal for each of our 16 bites of memory and a separate n.
Igel enable signal for each of our 16 bites of memory.
And so that could get a little bit unwieldy.
So what we'd like to do is be able to encode which of these 16 bites were reading or writing from using an address because you can represent a number from 0 to 15 using just a four bit address.
So the way we can do that is using this address decode logic where we have four address signals and these four bits essentially represent which address you know which of the 16 bites in memory we want we want to talk to and you know, our address.
Decode logic starts out by basically giving us the address signals and then an inverted copy of the address signal.
So we have a zero and in verse of a zero, a one in verse of a one a two in verse of a two a three, a universe of a three.
And then we have a bunch of the end gates.
And so if if we end together, the inverse is of a zero a one a two, a three.
This and gate will only turn on if all of these address addresses are 070000 Then this and gate turns on and our enable zero comes on.
And so that would be our enable Zero that would enable this this this first row in our address in our memory, if we had 1000 So, a binary of one, um then than this and gate wouldn't be on.
But this one would be because a zero is one.
And then the inverse of a Z A one a two a three is also one because a one a two and a three are zeros.
We have 1000 Then this is this.
All all of these signals are on.
And so this and gate turns on until our enabling reading from bite one, which is our second bite here in memory on someone so, you know, unable to is 0100 is essentially what's coming in on her address lines.
Over here for three, it's 1100 which is binary for three for 40010 and so on and so on until we get down to our 16th bite, which is 15 because we're zero based in that case, if our address lines are 1111 then this last one comes on.
We have enabled 15 and that enables reading from our AR 15 throw here.
And of course, this is for our enables, because we're also ending it with our enable signal down here at the bottom.
Uh, and so we'd have something similar for the right lines as well as we have.
You know, all the same things ended in the kind of a similar way with with our with our right signal down here instead of the enable signal is essentially how we would go about building a 16 bite memory.
Now we could do this, you know, by hand and build 128 of these Ah, of these individual memory cells.
But now you kind of have an understanding of how it works.
I'm actually gonna use a chip that does this for us.
And that's the 74 l s 1 89 which, if you can't find that you can also use the 74 1 89 without the l s, for some reason that that one's easier to find.
But if you can find the l s 1 89 that's that's fine, too.
But this is a 64 bit random access memory and of course, with eight bits per byte and 16 bites, that's eight times 16 128 bits.
This is only 64 bit, and that's because it essentially has a four bit.
It's four bits wide instead of eight bits wide.
But if we use two of these chips, then we'll be able to build our 88 bit 16 bite memory and let me take a look at the data sheet here.
They have a block diagram on the back of what's going on here, and you can see they have a 16 word by four bit memory cell array.
And that's basically what we have here.
Of course, we have a 16 word by eight bit, so they're basically just giving us half of this.
We're just fine because we can use to chips and you can see they have the four bits coming in.
They've got the four bits coming out and there's Ah, chip, select and right enable signals that enable whether we're reading or writing from this and then you can see the four address lines and, you know, they just have this address.
Decoder is a block, but course, you know, we just went through how that works.
This is essentially what that address decoder is doing, or something very similar to this.
And so if we look at the pin out here just to get a sense of what's going on, you can see, you know, like most of these chips, we've got our voltage and our ground to power the chip.
But then we've also got our address lines a zero a one, a two and a three, or address lines to select which of the rose we're gonna be reading or writing from.
And then we have our inputs.
D one d too.
D three and D four are inputs, so that's kind of coming in the top here.
And then we have our outputs 0102 03 and four and something that's ah little bit interesting here.
That we're gonna have to account for is you'll notice that our outputs have a little bar over over them.
And that's because this chip, for whatever reason, uh, the outputs give you the inverse of whatever stored in that memory location.
So, you know, we're gonna have to end up putting these outputs through an inverter because you know, we want a store.
We want to get the same value out that we stored.
We don't want to get the inverse of the value out.
So we're gonna have to use them inverter chips, too.
Sort of.
Re r un inverting his, I guess.
Um, so are our input there outputs our address lines.
And then the only other pins on here are this CS, which is Chip Select.
And that's essentially the enable.
So whenever it's an inverse signal, so whenever it's low, it's active.
Which means that when that's lower than we're going to get, um, data out of our outputs.
So in our case, we'll just we'll just hide that low all the time.
And then we'll use a Tri state buffer like we have for our other registers and then right enable.
And this is also an inverse logic.
So when it's low than it's reading in from our from our inputs and writing it to whatever location in memory is addressed from our address lines.
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8-bit computer RAM intro

19 分類 收藏
林宜悉 發佈於 2020 年 3 月 28 日
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